System mismatch on XC44

toby 3 years ago in IQANdesign updated by Gustav Widén (System support) 2 years ago 6

Keep getting system mismatch error with Internal State: Failed 106 on a XC44 with a MC43 master and can find very little information as to what this means. It might have to do with us having multiple XC43 and XC44 modules in the project with different pinouts/configuration, which are then enabled and disabled using digital adjust parameters, as when I enable certain ones I don't get the error and then other ones I do. If I get a new module it will not complain after the initial upload, but as soon as I update it again, the error returns and does not go away. Any help with this issue or more info on what this error means, would be much appreciated. Thanks 

So I have now figured out that if I rearrange the order of the modules under system layout, it changes which module has the system mismatch when enabled. I have 4 XC44's and no matter how I arrange them 1 out of the 4 gives me this error. Rearranging them will work as a work around for now though I'd much prefer not to need to do this. So not sure if its a software bug of if I'm reaching some kind of limit of modules allowed in a project, but any better solution would be appreciated. Thanks

Under review

Is there any other modules on the expansion bus in addition to the four XC44 modules? 

You mention multiple XC43, are these on the same physical bus?

How is the expansion bus configured? The bitrate, polling cycle time and application cycle time. 

I'm not sure but I wonder if the issue might be related to bus utilization. 

What IQANdesign software version are you using?

In the software they are all assigned to the same bus both XC44s and XC43s however in hardware only one module is ever connected and enabled at a time, so bus load is usually under 50%. The bitrate is 250k, cycle time is 15ms. Where would I find polling time? I am using the latest version, and the issue did seem to appear after I had updated from, however I was developing the app and adding more modules in the mean time so it may or may not be the related.

Ok so I doubt anyone will ever recreate this situation. But I figured out what happened. While testing an unrelated issue, we  wanted to send a message over the diagnostics bus so we didn't have to route an additional can line. So we had jumpered CAND to CANA and then forgot to remove it once we were done testing, so I guess that was messing with it under certain conditions. Once I removed the jumper everything seems to be working normally.

Nevermind, issue seems to have returned after reprogramming with a change to the output pin configuration.


Solved in a separate discussion, here is a summary for anyone reading this post: 

This XC4 system mismatch was due to an multiple XC44 modules with same address on same bus in the system layout. Normally this should be detected by the project check, but by enabling the modules with channels it had been possible to bypass the project check. 

The project check will be updated in 6.07 to catch this error at design time.